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P-5 Decoders

posted Nov 4, 2012, 2:58 AM by Neil Mathew   [ updated Nov 4, 2012, 3:36 AM ]

Making the 2:4 decoder should be fairly simple.

The only thing that continues to confuse me is the truth table. 
I've explained it here.

When using AND gates to make a decoder, the truth table is as follows:

However, the interior of the 74155 IC is designed as follows:

Notice the NOT gates before A, B (select lines) 

and C (data).  <<?? circle before AND?

MAINLY, the use of NAND gates instead of AND gates.

This causes the truth table to be as given below.
(Basically, inverting all the values. 0 when chosen, 1 elsewhere)


Here, it's G or G Dash. I understand that it acts as an enable.

C is the data.

How do I tell what value the enable wants?

I understand it from the IC.
If G dash is mentioned in the circuit, give it a ZERO. 


One way is to use two ICs as two separate 2:4 decoders to make a single 3:8 one.

Based on the above interior of the IC 74155
we can use the same IC as a 3:8 decoder if we ensure certain things.

(I haven't performed this on my own yet, but assume my theory here is right.)

A, B is same.
1G' and 2G' has the same line.
1C and 2C'2 has the same line too.