Sem 5 >
CA LAB
P-5 Decoders
Making the 2:4 decoder should be fairly simple. The only thing that continues to confuse me is the truth table. I've explained it here. When using AND gates to make a decoder, the truth table is as follows: ![]() Notice the NOT gates before A, B (select lines) and C (data). <<?? circle before AND? MAINLY, the use of NAND gates instead of AND gates. This causes the truth table to be as given below. (Basically, inverting all the values. 0 when chosen, 1 elsewhere) STROBE? Here, it's G or G Dash. I understand that it acts as an enable. C is the data. How do I tell what value the enable wants? I understand it from the IC. If G dash is mentioned in the circuit, give it a ZERO. 3:8 DECODER One way is to use two ICs as two separate 2:4 decoders to make a single 3:8 one. Based on the above interior of the IC 74155, we can use the same IC as a 3:8 decoder if we ensure certain things. (I haven't performed this on my own yet, but assume my theory here is right.) A, B is same. 1G' and 2G' has the same line. 1C and 2C'2 has the same line too. |
03 Setting the Digital Clocks
The DigiClocks can be found in the SOURCE Library. I've classified them in the ways I've used them. This may not be the conventional method, but it works for me. My Type #1: Normal Varying Clock Signal (INPUT) OFFTIME- duration of low (0) ONTIME- duration of high (1) These control the duration of the high and low cycles of the clock. Both are set equal at 0.2uS so that they are high and low for equal durations. When there are many clock inputs required, inorder to see my output clearly, I keep each clock with a different duration, usually in multiples. eg: 0.1uS , 0.2uS , 0.4uS , 0.8S STARTVAL - the starting value of the clock Here, set as 0. My Type #2: Fixed Value Clock Signal (ENABLE) Here, I alter the OFFTIME and ONTIME by assigning one of them a value of 0uS That way, it will remain in only one state: low or high. Always 0: ![]() Always 1: My Type #3: Changing the Delay In order to distinguish between the various input clock signals, I initially used delay instead of changing the ontime and offtime. They used to create excessive propagation delays which I found unfavorable. Hence, I don't use this type anymore. |
02 Closer Look at ICs
All The ICs used > DUAL, QUAD here means how many such components are available in that one IC. ** 74157 IC TTL quad 2-to-1 data selector multiplexer with non-inverted data outputs (74157 was a unique IC. All four 2:1 MUX had the same select inputs)
Note the last, C0 is the select input (m) or Input Carry. Left: A4 A3 A2 A1 B4 B3 B2 B1 C0 Right: C4 SUM4 SUM3 SUM2 SUM1 Usually just one 4:1 MUX is used. EA' should be supplied 0. Again, only one of the two decoders is used. A, B are the Inputs. (Treat as B A as in 1 0 = 2) G' is the enable (Supply it 0) C is the store (Supply it 1) |
P-1 Adders & Subtractors & Adder-Subtractor & Incrementer & Decrementer
We've done this countless times in so many different ways.
That said, I say it's easier if I just mention the functions used: NOT 7404 AND 7408 OR 7432 XOR 7486
Full-Subtractor Circuit Binary Adder-Subtractor Circuit Take a good look at the circuit: Here the [+] are the full adders. Use the clock as M to control whether it adds or not. That is, when m=0 it acts as an ADDER And when m=1 it acts as a SUBTRACTOR To get the B' + 1 (2's complement) we use the XOR Gate. B (+) 0 = BB (+) 1 = B' 7483A ( 4-BIT BINARY FULL-ADDER CIRCUIT) |
01 Basic Stuff
I had some problems pasting images in the CA Lab during the first few classes. So, instructions to start a project are unfortunately not aided with screenshots. Softwares Used: ORCAD Capture & PSpice Without pictures, I really don't see the point in explaining how to create a project. So, I'll just mention a few mistakes I made which I hope I won't make again. Caution #1 When you create a project, make a 'combined' 'analog' project. My memory is a bit faulty but I do recall facing problems in the simulation if the above is not properly specified. Caution #2 We are using a Trial Version of OrCad. Hence, the software repeatedly checks online and continues to remind the user to validate the software. This causes all kinds of problems like it not starting up, random closing of unsaved projects, and a stupid dialog box which will not disappear until you click TRY AGAIN a countless number of times. Solution: Disconnect your system from the internet. Trust me, it helps. Caution #3 When you place the various components (Gates, ICs, etc) onto the page, make sure you take them from the EVAL Library. If you take them from elsewhere, a green circle is seen next to each gate. See it as a sign of doom. Your circuit will not simulate properly. Caution #4 This, not so important. But something I've repeatedly faced. Make sure your connecting wires are... well.. properly connected. Often the wires seem like they are connected, but they're not. Check that in the following way. Move the gate or component around and if the wires move with it, It's connected. Only Screenshots I could manage. The Main Toolbar. ![]() The PSpice Toolbar |
1-9 of 9